1. Field of the Invention
The present invention relates to a jitter reducing circuit for reducing fluctuation sitter) of a picture displayed on an image screen of a monitor device.
2. Description of the Prior Art
When a video signal recorded on a magnetic tape is reproduced by a known helical scan type VTR, there may appear a variation of phase of a reproduced picture signal due to variation of magnetic tape running speed and/or variation of rotation speed of a rotary head, etc. The variation of phase on a time axis is called time axis error or jitter. When a picture signal containing jitter is displayed on an image screen of a monitor device, etc., as an image, the image on the screen fluctuates.
Such jitter may also occur due to other reasons such as variation of rotation speed of a disk, eccentricity thereof and vibration thereof when a picture signal is reproduced from a video disk by a video disk reproducing device.
On the other hand, in the afore-mentioned monitor device, a video image reproduced on the monitor screen may be influenced adversely by noise mixed in a sync signal. In order to prevent such adverse influence, an automatic frequency control (AFC) circuit constituting a horizontal deflection circuit of the monitor device is usually used to synchronize an operation of the monitor device with an average period of a plurality of sync signals.
Such prior art and problems inherent thereto will be described with reference to FIGS. 1 to 3, in which FIG. 1 is a block diagram of a portion of a horizontal deflection circuit of a monitor device, FIG. 2 shows a relation between a reproduced signal and an output of the AFC circuit and FIG. 3 is a block diagram of a TBC (Time Base Correction) circuit.
As shown in FIG. 1, the portion of the horizontal deflection circuit of the monitor device is constituted with a sync separation circuit 61 for separating a sync signal of an input picture signal (monitor input) bb, the AFC circuit 62 for correcting phase of the sync signal from the sync separation circuit 61 and a subtractor 63 for producing a difference between the picture signal bb and the output of the AFC circuit 62.
The AFC circuit 62 is constituted with a phase detector circuit, an integrator circuit, a variable control oscillator (VCO) and a comparing signal generator circuit, etc., all of which are not shown. The phase detector circuit compares a phase of a comparing signal (saw tooth voltage) with a phase of an incoming horizontal sync signal and outputs a correction voltage corresponding to a phase difference if any. The correction voltage which takes in the form of pulse voltage is averaged by the integration circuit and controls the horizontal oscillator circuit. The horizontal oscillator circuit (voltage control oscillator) generates a stable horizontal pulse signal on the basis of the correction voltage.
In the horizontal oscillator circuit, when jitter of an input picture signal (for example, a video signal reproduced by a VTR, that is, a sync signal contained in the video signal) and jitter of the output signal of the AFC circuit 62 have a certain phase difference and a certain amplitude difference, jitter contained in an output of the subtractor 63 can not be removed, as shown in FIG. 2. Incidentally, FIG. 2 shows waveforms of jitter components of the sync signal, the video signal and the output signal of the AFC circuit 62, for showing a relation between jitters contained therein.
When the video signal containing jitter is supplied to the monitor device, the above mentioned fluctuation of image occurs since jitter of the output signal of the AFC circuit 62 does not completely follow jitter of the reproduced picture signal. In detail, since jitter of the output signal of the AFC circuit 62 does not follow jitter contained in the sync signal of the reproduced picture signal, the reproduced image on the monitor screen fluctuates.
In order to solve this problem, the conventional VTR is provided with a TBC (Time Base Correcter) circuit to remove the time axis variation of the reproduced signal, which occurs in a recording/reproducing process.
As shown in FIG. 3, the TBC circuit is constituted with a sync separator circuit 72 for separating a horizontal sync signal from a luminance signal reproduced by a VTR 71, a PLL circuit 73 for producing a write clock for a memory 76 on the basis of the horizontal sync signal from the sync separator circuit 72, an A/D converter 75 for converting the luminance signal reproduced by the VTR 71 into a digital signal, the memory 76 for reading/writing the digital signal converted by the A/D converter 75, a D/A converter 77 for converting the digital signal read out from the memory 76 into the analog luminance signal and an oscillator 74 for producing a read clock for reading the signal written in the memory 76. The TBC circuit further includes a decoder 78 and an encoder 79 as to be described later.
Since the PLL circuit 73 produces the write clock having frequency which is a multiple of that of the sync signal and, thus, the write clock follows jitter of the reproduced signal, the reproduced luminance signal is written in the memory 76 by the write clock. The luminance signal written in the memory 76 is read out by the stable read clock produced by the oscillator 74, resulting in that jitter of the luminance signal is removed and the luminance signal containing no jitter is obtained.
The VTR 71 simultaneously reproduces a chrominance or color signal which is converted by the decoder 78 into color difference signals and then jitter thereof is removed in a similar manner to the jitter removal of the luminance signal. The jitter removed color difference signals are encoded by the encoder 79 to the standard signal to be interleaved with the luminance signal.
Since, however, the TBC circuit is adapted to convert the luminance signal and the color signal into digital signals and write them in and read them from the memory, its construction becomes complex and expensive and a control thereof is complicated.
Under the circumstance, a realization of a jitter reducing circuit which is simple in construction and capable of preventing an image on a monitor screen from being fluctuated has been requested.